Announcement: Store Upgrade Notice Thank you to all our customers—both new and returning—for your continued support. To serve you better, we’ve upgraded our store. We’re excited to provide you with an improved shopping experience and even better service.Please note:You can still visit our original pages at shop.youyeetoo.com to check your existing orders, but new orders can no longer be placed there. The original store is scheduled to be fully closed in December.We sincerely apologize for any inconvenience this may cause.While our new store is now live, there may still be areas we’re working to improve. If you need any assistance, please don’t hesitate to contact us at shop@youyeetoo.com. We’re here to help.
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The Tang Mega 138K Pro is a high-density FPGA development system built around the Gowin GW5AST-LV138FPG676A chip. Designed for demanding applications in high-speed communication and edge computing, this board combines massive logic resources (138K LUTs) with nearly 300 DSP units and eight high-speed transceivers supporting up to 12.5Gbps. The integrated RISC-V AE350 hard core and dedicated PCIe hardware ensure efficient processing and seamless host connectivity. Ideal for researchers, engineers, and hobbyists tackling complex signal processing and AI inference tasks.
Key Features
Massive Logic Capacity: With 138,240 Look-Up Tables (LUTs) and 298 multipliers, handle complex algorithms and large-scale state machines with ease.
High-Speed Connectivity: Features 8 transceivers (270Mbps–12.5Gbps) and a native PCIe 3.0 hard core (x1/x2/x4/x8), enabling fiber optic transmission and high-bandwidth data exchange.
Embedded SoC Architecture: Includes a hard-core RISC-V AE350 processor, allowing for hybrid CPU+FPGA designs without consuming soft logic resources.
Rich I/O Ecosystem: The carrier dock board provides dual SFP+ cages, Gigabit Ethernet, MIPI CSI/D-PHY interfaces, and DVI TX/RX for versatile multimedia and networking applications.
Generous Memory: Onboard 1GB DDR3 (configured as 512MB x 2) and 256Mbits Flash ensure ample space for data buffering and configuration storage.
Developer Friendly: Comes with an onboard USB JTAG debugger and UART interface, eliminating the need for external programmers. Supports Gowin IDE v1.9.9+ (Commercial License required).
Technical Specifications
FPGA Chip: GW5AST-LV138FPG676A (22nm)
Logic Resources: 138,240 LUT4, 138,240 Flip-Flops
Memory: 1GB DDR3 (1,333 Mbps), 256Mbits SPI Flash
High-Speed I/O: 8x Transceivers (up to 12.5Gbps), PCIe 3.0 Hard Core